Looking forward on cellular & connectivity convergence, a single transceiver would include multiple phase locked loops (PLLs) generating, simultaneously, different frequencies. In some embodiments, using multiple PLLs to generate different frequencies results in large area, high power and mutual frequency pulling. In order to generate different frequencies, in some embodiments, the multiple PLLs are replaced by a single PLL and multiple digital to time converters (DTCs). DTCs are important building blocks in communication systems. A DTC is a building block which delays incoming signal edges according to a digital code at its input. A DTC can offset frequency by adding a linear phase ramp. In some embodiments, replacing multiple PLLs with a single-PLL and multiple DTCs facilitates to generate multiple frequencies at the same time, which results in major area reduction, and power reduction. Moreover, utilizing DTCs enables fast change of LO frequency as DTC output frequency can be modified instantaneously. However, any non-linearity in the DTC can cause spurs and can affect the performance of the DTCs.